“The Atmel AVR UC3 C series delivers more processing power—in a smaller footprint—than any other microcontroller in our line card,” said Haakon Skar, marketing director of AVR UC3 products, Atmel Corporation. “The new series offers better performance and enables us to include this new FPU without negatively impacting the microcontroller power consumption. These new 32-bit AVR microcontrollers complement our already-strong line card of 8-bit AVR MCUs targeting the industrial control.”
The Atmel UC3 C series is the first Atmel 32-bit AVR microcontroller built for high-speed communication designed for 3.0 – 5.5V operation with a true 5V operation. A 5V supply voltage is a requirement for many industrial control applications to allow better signal-to-noise ratio, particularly in applications that require large switching currents or very sensitive analog instrumentation. The UC3 C series comes with a 9-layer databus, 64 + 4KB high-speed SRAM and a mix of high-speed communication peripherals including a 100Mbps Ethernet, Dual CAN ports and a full-speed USB interface. An SDRAM interface is included in larger devices. The layered databus and split SRAM architecture allows the system designer to easily avoid clashes on high-speed communications that could result in package loss or decreased system performance.
The UC3 C series also offers the Atmel Peripheral Event System which is found in the Atmel UC3 L series and Atmel 8-bit AVR XMEGA products. The Event System allows inter-peripheral communication to take place without CPU intervention and guarantees two-cycle latency between the completion of one peripheral operation and the start of another. This ultimately eliminates the jitter and unpredictable latency associated with a traditional CPU interrupt.
Finally, the UC3 C series includes FlashVault code protection, a flash security technology that allows the on-chip flash to be partially programmed and locked, creating secure on-chip storage for secret code and software intellectual property. Code stored in the FlashVault will execute as normal, but cannot be read, copied or debugged. This allows a device with FlashVault code protection to carry valuable software, such as a math library or an encryption algorithm, from a trusted location to a potentially untrustworthy partner where the rest of the source code can be developed, debugged and programmed.
Features:
- High Performance, Low Power 32-bit AVR Microcontroller
- Compact Single-cycle RISC Instruction Set Including DSP Instruction Set
- Built-in Floating-Point Processing Unit (FPU)
- Read-Modify-Write Instructions and Atomic Bit Manipulation
- Performing 1.49 DMIPS / MHz
- Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
- Up to 49 DMIPS Running at 33 MHz from Flash (0 Wait-State)
- Memory Protection Unit
- Multi-hierarchy Bus System
- High-Performance Data Transfers on Separate Buses for Increased Performance
- 16 Peripheral DMA Channels Improves Speed for Peripheral Communication
- Internal High-Speed Flash
- 512 Kbytes, 256 Kbytes, 128 Kbytes, 64 Kbytes Versions
- Single Cycle Access up to 33 MHz
- FlashVault Technology Allows Pre-programmed Secure Library Support for End User Applications
- Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
- 4ms Page Programming Time and 8ms Full-Chip Erase Time
- 100,000 Write Cycles, 15-year Data Retention Capability
- Flash Security Locks and User Defined Configuration Area
- Internal High-Speed SRAM, Single-Cycle Access at Full Speed
- 64 Kbytes (512 KB and 256 KB Flash), 32 Kbytes (128 KB Flash), 16 Kbytes (64 KB Flash)
- 4 Kbytes on the Multi-Layer Bus System (HSB RAM)
- External Memory Interface on AT32UC3C0 Derivatives
- SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
- Interrupt Controller
- Autovectored Low Latency Interrupt Service with Programmable Priority
- System Functions
- Power and Clock Manager
- Internal 115KHz (RCSYS) and 8MHz/1MHz (RC8M) RC Oscillators
- One 32 KHz and Two Multipurpose Oscillators
- Clock Failure detection
- Two Phase-Lock-Loop (PLL) allowing Independent CPU Frequency from USB or CAN Frequency
- Windowed Watchdog Timer (WDT)
- Asynchronous Timer (AST) with Real-Time Clock Capability
- Counter or Calendar Mode Supported
- Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
- Ethernet MAC 10/100 Mbps interface
- 802.3 Ethernet Media Access Controller
- Supports Media Independent Interface (MII) and Reduced MII (RMII)
- Universal Serial Bus (USB)
- Device 2.0 and Embedded Host Low Speed and Full Speed
- Flexible End-Point Configuration and Management with Dedicated DMA Channels
- On-chip Transceivers Including Pull-Ups
- One 2-channel Controller Area Network (CAN)
- CAN2A and CAN2B protocol compliant, with high-level mailbox system
- Two independent channels, 16 Message Objects per Channel
- One 4-Channel 20-bit Pulse Width Modulation Controller (PWM)
- Complementary outputs, with Dead Time Insertion
- Output Override and Fault Protection
- Two Quadrature Decoders
- One 16-channel 12-bit Pipelined Analog-To-Digital Converter (ADC)
- Dual Sample and Hold Capability Allowing 2 Synchronous Conversions
- Single-Ended and Differential Channels, Window Function
- Two 12-bit Digital-To-Analog Converters (DAC), with Dual Output Sample System
- Four Analog Comparators
- Six 16-bit Timer/Counter (TC) Channels
- External Clock Inputs, PWM, Capture and Various Counting Capabilities
- One Peripheral Event Controller
- Trigger Actions in Peripherals Depending on Events Generated from Peripherals or from Input Pins
- Deterministic Trigger
- 34 Events and 22 Event Actions
- Five Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
- Independent Baudrate Generator, Support for SPI, LIN, IrDA and ISO7816 interfaces
- Support for Hardware Handshaking, RS485 Interfaces and Modem Line
- Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
- One Inter-IC Sound (I2S) Controller
- Compliant with I2S Bus Specification
- Time Division Multiplexed mode
- Three Master and Three Slave Two-Wire Interfaces (TWI), 400kbit/s I2C-compatible
- QTouch Library Support
- Capacitive Touch Buttons, Sliders, and Wheels
- Touch and QMatrix Acquisition
- On-Chip Non-intrusive Debug System
- Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace
- Wire single-pin programming trace and debug interface muxed with reset pin
- NanoTrace provides trace capabilities through JTAG or aWire interface
- 3 package options
- 64-pin QFN/TQFP (45 GPIO pins)
- 100-pin TQFP (81 GPIO pins)
- 144-pin LQFP (123 GPIO pins)
- Two operating voltage ranges:
- Single 5V Power Supply
- Single 3.3V Power Supply
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