Delta-Sigma ADC Design

The strength of the delta-sigma (ΔΣ) architecture also happens to be one of its biggest limitations. ΔΣ analog-to-digital converters (ADCs) contain a large amount of digital circuitry¾in many cases more than 50% of the die area. The die can benefit from scaling a submicron CMOS technology, but only if the necessary analog structures remain available.